Microcode inside the Intel 8087 floating-point chip: register exchange
The Intel 8087 floating-point chip, introduced in 1980, significantly accelerated floating-point operations. It utilizes complex microcode to execute instructions, including the FXCH instruction, which exchanges two floating-point registers. A team is currently reverse-engineering this microcode to better understand its functionality and the algorithms it employs.
- ▪The 8087 chip made floating-point operations up to 100 times faster than previous methods.
- ▪It contains 1648 micro-instructions that implement its instruction set, each 16 bits long.
- ▪The FXCH instruction uses 14 micro-instructions to perform the register exchange.
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| Original publisher | Righto |
| Canonical URL | https://www.righto.com/2026/05/microcode-inside-intel-8087-floating.html |
| Publication time | Sat, 30 May 2026 17:27:13 +0000 |
| Retrieval time | 2026-05-30T18:09:43.078Z |
| Last seen | 2026-05-30T18:09:43.078Z |
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In 1980, Intel introduced the 8087 floating-point chip, a co-processor that made floating-point operations up to 100 times faster. This chip was highly influential, and today most processors use the floating-point standard introduced by the 8087. The 8087 uses complicated algorithms to accurately compute functions such as square roots, tangents, and exponentials. These algorithms are implemented inside the chip in low-level code called microcode. I'm part of a group, the Opcode Collective, that is reverse-engineering this microcode. In this post, I take a close look at the microcode for one of the 8087's instructions—FXCH—and explain how the microcode works. The FXCH (Floating-point Exchange) instruction exchanges two floating-point registers.
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